Taiwanese chip designer MediaTek has appointed former TSMC executive Douglas Yu as a part-time adviser, in a move that underscores how advanced chip packaging has become one of the most valuable and strategically sensitive segments of the global artificial intelligence supply chain.
The appointment comes as MediaTek intensifies efforts to expand beyond its traditional smartphone chip business into AI accelerators, custom silicon, and advanced computing infrastructure, sectors now attracting hundreds of billions of dollars in global investment.
Yu joined TSMC in 1994 and retired in 2025 after more than three decades at the world’s largest contract chipmaker. During that period, he held several senior positions in backend research and development and played a central role in developing TSMC’s advanced packaging technologies, including its highly sought-after CoWoS platform.
CoWoS, short for Chip-on-Wafer-on-Substrate, has become one of the foundational technologies powering the modern AI boom.
The technology enables high-performance processors, memory stacks, and other semiconductor components to be tightly integrated into a single package, significantly improving data-transfer speeds, reducing latency, and increasing energy efficiency. The packaging architecture is widely used in advanced AI chips, including processors designed by Nvidia for training and running large AI models.
MediaTek said Yu would help guide the company’s research, development, and investment strategy in future advanced packaging technologies tied to TSMC’s ecosystem.
The hiring pinpoints a profound shift underway across the semiconductor industry. Historically, leadership in chipmaking was defined largely by transistor miniaturization and fabrication process technology. But the rise of generative AI has changed the economics of computing, pushing advanced packaging into the center of the competitive landscape.
Industry executives increasingly describe packaging as the new bottleneck in AI infrastructure. The enormous computational demands of large language models and AI accelerators require processors and high-bandwidth memory systems to operate with extremely fast interconnect speeds. That has made sophisticated packaging solutions such as CoWoS essential to AI server performance.
As a result, TSMC’s advanced packaging capacity has become one of the most constrained resources in the global technology sector.
Customers, including Nvidia, major cloud providers, and AI startups, have spent the past two years scrambling to secure CoWoS capacity amid persistent shortages. Analysts say packaging constraints, rather than wafer fabrication limits, have increasingly become the primary factor slowing deliveries of advanced AI hardware.
The bottleneck has grown so severe that several hyperscalers and semiconductor firms have begun redesigning supply chains and investing directly in packaging ecosystems to secure future access. Against that backdrop, MediaTek’s recruitment of one of the architects behind CoWoS signals that the company wants a much deeper role in the AI infrastructure value chain.
The company last week said it expects to generate multiple billions of dollars in revenue from AI accelerator ASIC chips by 2027, marking one of its clearest indications yet that it intends to become a major supplier in the custom AI chip market.
ASICs, or application-specific integrated circuits, are increasingly viewed as one of the fastest-growing segments in semiconductors as hyperscalers seek alternatives to general-purpose GPUs. Companies such as Amazon, Google, and Microsoft are aggressively developing custom AI chips to reduce costs, optimize workloads, and lessen dependence on Nvidia’s expensive processors.
That shift has created significant opportunities for chip designers capable of offering tailored AI silicon solutions.
MediaTek’s growing ambitions also reflect broader structural changes in the global semiconductor industry. Demand tied to AI data centers has triggered one of the largest infrastructure spending cycles in technology history, with major cloud providers expected to collectively spend hundreds of billions of dollars annually on AI-related infrastructure through the decade.
Much of that spending is flowing toward chips, memory systems, networking equipment, and packaging technologies. Taiwan has emerged as perhaps the single most strategically important location in that ecosystem.
Beyond TSMC’s dominance in advanced chip manufacturing, Taiwan has also become critical in server assembly, advanced packaging, AI hardware integration, and semiconductor testing. The island’s ecosystem now sits at the center of the AI compute supply chain that powers companies including Nvidia, Microsoft, Amazon, Meta, and Google.
That dominance has elevated geopolitical concerns surrounding Taiwan’s semiconductor industry, particularly amid rising tensions between the United States and China. Washington increasingly views Taiwan’s semiconductor infrastructure as a critical national security asset, while Beijing continues efforts to build domestic alternatives and reduce dependence on foreign chip technologies.
Advanced packaging has become especially sensitive because it represents an area where Taiwan retains a substantial technological lead that competitors have struggled to replicate quickly.
MediaTek’s closer alignment with TSMC’s packaging roadmap could therefore strengthen both its technological positioning and its importance within the broader AI ecosystem. The move also signals how semiconductor competition is evolving beyond individual chips toward system-level optimization. Increasingly, AI performance depends not only on processor design, but on how chips, memory, networking, and power systems are integrated together.
Companies capable of mastering that integration are expected to hold a major advantage in the next phase of AI infrastructure development.
For MediaTek, which built its reputation in smartphone processors and connectivity chips, the transition into AI infrastructure represents an attempt to move into higher-margin, faster-growing markets as global smartphone demand matures. The company has already been expanding into automotive chips, edge computing, and custom silicon. Bringing in a veteran deeply tied to TSMC’s most critical packaging technologies suggests MediaTek sees advanced integration capabilities as essential to competing in the next era of AI computing.
Industry analysts say the appointment may also provide MediaTek with earlier insight into future packaging developments, including next-generation heterogeneous integration technologies expected to become increasingly important as AI chips grow larger, hotter, and more power-intensive.
In the AI era, semiconductor leadership is no longer determined solely by who can build the fastest chip. Increasingly, it is determined by who can assemble the most efficient computing system around it.
MediaTek’s latest move shows the company intends to be part of that race.
