Xilinx Demos Optical Transport Network (OTN) – Virtex-6 HXT Is the the industry’s Highest Serial BW FPGA

Xilinx successfully  showcased its optical transport network (OTN) portfolio  and explained how the technology could help customers overcome high bandwidth optical transport network (OTN) challenges at the Linley Tech Carrier Conference last week. The demo covered  quality of service (QoS) and traffic management requirements for high bandwidth networks.


Xilinx demonstrated its Virtex-6 HXT FPGA Optical Transport Network (OTN) Targeted Design Platform for supporting faster market implementation of 100G line cards and demonstrating the key technologies enabling high bandwidth applications.


Xlinix announced its Flexible Platform for 100G Optical Transport Network Solutions Development and Smooth Transition to 400G  in March this year.  System architects can use the OTN platform to quickly demonstrate and evaluate the flexibility, high-end performance and integration capabilities of Xilinx(R) FPGAs for 100G OTN applications. They can later smoothly migrate their designs to the Virtex-7 HT FPGA family to evolve to 400G line card applications.


“In order for the communications industry to effectively answer the insatiable demand for bandwidth, optical communications equipment vendors must deliver more rapidly and more effectively the necessary levels of flexibility, integration and performance without raising power consumption or costs into their optical platforms,” said Krishna Rangasayee, Corporate Vice President and General Manager of Xilinx’s Communications Business Unit. “As part of Xilinx’s recent acquisition of Omiino Ltd., we have created a new OTN Solution Delivery Center that will include all of Omiino’s deep OTN expertise plus their existing portfolio of OTN solutions and OTN development platforms to give our customers the most optimized and cost effective solution for their systems.”



Virtex-6 HXT and Virtex-7 HT Devices?

Virtex-6 HXT FPGAs  are the the industry’s highest serial bandwidth through a combination of 6.6 Gbps GTX transceivers and 11.18 Gbps GTH transceivers to enable next-generation packet and transport, switch fabric, video switching and imaging equipment. The devices are built on 40nm process using third-generation Xilinx ASMBL(TM) architecture and offer 15 percent higher performance and 50 percent lower power consumption as compared with competitive 40nm FPGA offerings. The devices operate on a 1.0v core voltage with an available 0.9v low-power option.


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